QuoteDisplay MoreOriginally posted by M.Beier
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The basic integer pipeline appears to be 14 stages long, making it a significant decrease from the 31+ stage pipeline in Prescott and a slight increase from the 12 stage pipeline in the Athlon 64. Intel's move to a much shorter pipeline will definitely decrease power consumption (as well as clock speed), but hopefully improve performance considerably.
Note that with a 4-issue core, the new processors will actually have a higher degree of ILP than AMD's Athlon 64, and with a slightly deeper pipeline the CPU should be able to reach higher clock speeds than what AMD has been able to achieve. We'd expect that at 65nm these new cores could run as high as 3GHz in clock speed, but definitely not at the 4GHz+ levels that we currently have with the Pentium 4.
Given the significant reduction in pipeline stages, Intel's claims of a 5x improvement in performance per watt over the Pentium 4 architecture seems very realistic.
The new architecture will feature a shared L2 cache between the cores, much like what we've seen from Yonah already. Intel also said that there would be a higher "relative" increase in L2 cache bandwidth. The new processors will also apparently feature a direct L1-to-L1 cache transfer system in order to improve the currently very poor cache-to-cache transfer performance of Intel's dual core processors.
There are also a number of new prefetching algorithms, allowing data to be prefetched from L1 to L1 (one core to another), L1 to L2, etc... Intel is also introducing speculative data loads with the new architecture, loads to be executed ahead of stores if a dependency is predicted to not exist between the two. We are waiting for more details on the feature to be exact about its functionality.
Both Conroe and Merom (desktop and mobile) will feature 2 cores. Intel says that Conroe will be available in multiple L2 cache sizes, while Merom will not. We'd assume that the multiple L2 cache sizes would be to accomodate and differentiate products like the Extreme Edition.
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Står ikke direkte, men du kan vel fange pointen af effekten ud fra den smøre, right?
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Lidt mere info:
Technology
The Intel Core Microarchitecture is designed from the ground up, but similar to the Pentium M in design philosophy. The pipeline is 14 stages — a fairly radical departure from the 31 stages in Prescott, a signature feature of wide order execution cores; Core's execution unit is 4-issues wide, compared to the 3-issue cores of P6, P6-M (Banias and derivatives), and NetBurst microarchitectures. The new architecture is a dual core design with linked L1 cache and shared L2 cache engineered for maximum performance per watt and improved scaleability.
One new technology included in the design is Macro-Ops Fusion, which combines two x86 instructions into a single microinstruction. For example, a common code sequence like a compare followed by a conditional jump would become a single micro-op. Other new technologies include 1 cycle throughput (2 cycles previously) of all 128-bit SSE instructions and a new power saving design. All components will run at minimum speed, ramping up speed dynamically as and when needed. This allows the chip to produce less heat, and consume as little power as possible. The front side bus for this new architecture is targeted to run at 1333 MHz for the Woodcrest, the server and workstation variant, and at 667 MHz for Merom, the mobile variant, though a second wave of Meroms, supporting an 800 MHz FSB, is planned. The desktop Conroe version is officially slated to run at 1066 MHz, with an Extreme Edition at 1333 MHz, and a budget version at 800 MHz. Unfortunately, the FSB is the weak link in the new architecture, as it uses the infrastructure installed in the Pentium 4 era which cannot handle the full bandwidth of dual-channel DDR2 SDRAM, or the new memory architecture FB-DIMM.
Intel says that the power consumption of these new processors is to be extremely low — average use energy consumption is to be in the 1-2 watt range in ultra low voltage variants, with TDPs of 65 watts for Conroe and 80 watts for Woodcrest. However, this is subject to change. Merom, the mobile variant, is listed at 35 watts TDP for standard versions and 5 watts TDP for Ultra Low Voltage (ULV) versions.
Previously, Intel warned that it would focus on power efficiency ("Performance per Watt") rather than raw performance. However, at IDF, Intel advertised both. Some of the promised numbers are:
* 20% more performance for Merom at the same power level (compared to Core Duo)
* 40% more performance for Conroe at 40% less power (compared to Pentium D)
* 80% more performance for Woodcrest at 35% less power (compared to dual-core Xeon)
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Lidt til Fragman:
Laptops
* Merom, first eighth-generation notebook chip, 65 nm, dual-core, 2-4 MB L2 cache
* Penryn, dual-core, 45 nm shrink of Merom, 3-6 MB L2
* Perryville, single-core, 45 nm mobile and desktop processor, 2 MB L2
Desktops
* Conroe, first eighth-generation desktop chip, 65 nm, dual-core, 4 MB L2 cache
* Allendale, dual-core, cut-down Conroe with 2 MB L2
* Kentsfield, quad-core MCM, consists of two Allendales, 2 × 2 MB L2
* Millville, single-core, cut-down Allendale with 1 MB L2
* Ridgefield, dual-core, 45 nm shrink of Conroe, with 6 MB L2
* Wolfdale, dual-core, 45 nm shrink of Allendale, with 3 MB L2
* Perryville, single-core, 45 nm mobile and desktop processor, 2 MB L2
* Yorkfield, eight-core MCM, 45 nm, 12 MB L2, successor to Kentsfield
Bentzin:
http://www.intel.com/technolog…cture/coremicro/index.htm
for dem der ikke gider det der tekniske...som bentzin efterlyste...så har conroe kortere pipeslines i dens arkitektur. (se det som olierørledning.) jo kortere den er, jo mindre tryk skal der til for at der kommer samme mængde olie igennem....erstat så trykket med mhz og olien med data 
...jo kortere pipes jo færre mhz for at kunne opnå samme datamængde. jo færre mhz jo køligere...og en mindre core hjælper også på det (65 og 45nm mod 90nm). Dermed bliver den så kølig at man kan smide mere cache på den, da det er kendt for at give en del varme fra sig.....
) - men ment som noget generelt, når du og enkelte andre, f.eks. kaster en hel masse tal, koder, begreber og andet indforstået "gejl" ind på banen - godt blandet med dine helt specielle facon at skrive på. 
for lige at dreje ind på emnet igen.. 
